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| Multimedia ICs Clock generator for video CD systems BU2173F The BU2173F is an IC that generates the CPU clock signal, system clock signal and video clock signal used in video CD systems. A single crystal resonator can generate three different oscillation frequencies. *Applications Video CD systems *Featuresfrequency clock signals can be generated 1) Three with a single attached crystal resonator. 2) Two internal PLL channels. 3) Internal loop filter, eliminating the need to attach a loop. 4) Single 5.0V power supply. 5) SOP 18-pin package. *Block diagram XTALI XTALO 13.5MHz DATA1A M U X DATA1B 1/2 PLL1 FOUT1 40.5MHz XTAL OSC. 1/4 FOUT4 3.375MHz DATA2A 1/3 DATA2B M U X DATA2C 1/2 PLL2 M U X FOUT2 27.0MHz or 28.6363MHz or 28.375MHz DATA2D Vref CTRLC CTRLB CTRLA AVDD AVSS VDD VSS VDDIO VSSIO TEST TSTI TSTO FOUT3 1 Multimedia ICs BU2173F *Pin description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Pin name VDD TSTO XTALI XTALO CTRLA CTRLB CTRLC TSTI VSS AVSS FOUT3 VSSIO FOUT2 TEST FOUT1 VDDIO FOUT4 AVDD Digital VDD Open in the normal mode (used for testing) Reference oscillation input Reference oscillation output GD-G / VCD clock switching Stays at the high level when the IC is in the normal mode CD-G PAL / NTSC clock switching Connect to Vss when the IC is in the normal mode (used for testing) Digital ground Analog ground Not used (open when the IC is in the normal mode) I / O ground Clock output 2 Setting the test mode (connect to Vss when the IC is in the normal mode) Clock output 1 I / O VDD Clock output 4 Analog VDD Function Type -- B C C A A A A -- -- B -- B A B -- B -- *Absolute maximum ratings (Ta = 25C) Parameter Power supply voltage Power dissipation Operating temperature Storage temperature Symbol VDD Pd Topr Tstg Limits - 0.3 ~ + 7.0 450 - 5 ~ + 70 - 25 ~ + 125 Unit V mW C C Reduced by 4.5 mW for each increase in Ta of 1C over 25C. *Recommended operating conditions (Ta = 25C) Parameter Power supply voltage Input high level voltage Input low level voltage Operating temperature Symbol VDD, AVDD, VDDIO VIH VIL Topr Limits 4.75 ~ 5.25 0.8VDD ~ VDD 0.0 ~ 0.2VDD - 5 ~ + 70 Unit V V V C 2 Multimedia ICs BU2173F *Input / output circuits Type A Type C Pin Pin To inside Type B Pin Pin From inside To inside *Electrical characteristics (unless otherwise noted, Ta = 25C, VDD = 5.0V, AVDD = 5.0V, IOVDD = 5.0V) Parameter Input current, low level Input current, high level Input voltage, low level Input voltage, high level Output voltage, low level Output voltage, high level Operating supply current Reference frequency Output frequency (1) Symbol IIL IIH VIL VIH VOL VOH IDD fREF f1 f2A Output frequency (2) f2B f2C Output frequency Jitter Reference frequency Output frequency (2) (1) fREF2 f1B f2D Output frequency (2) f2E Output frequency (4) f4B -- -- 28.636 3.579 -- -- MHz MHz (4) f4 Min. - 300.0 - 300.0 -- 4.0 -- 2.4 -- -- -- -- -- -- -- -- -- -- -- Typ. 0.0 0.0 -- -- -- -- 30 13.5 40.5 27.000 28.375 28.636 3.375 1.0 14.318 40.5 27.000 Max. 300.0 300.0 1.0 -- 0.5 -- 50 -- -- -- -- -- -- -- -- -- -- Unit A A V V V V mA MHz MHz MHz MHz MHz MHz ns MHz MHz MHz IOL = 4.0mA IOH = - 4.0mA fXTAL = 13.5 MHz, no load Use with CTRLB at the high level f1 = fREF x 96 / 16 / 2 f2A = fREF x 96 / 16 / 3 CTRLA = H, CTRLB = H, CTRLC = H f2B = fREF x 227 / 54 / 2 CTRLA = L, CTRLB = H, CTRLC = L f2C = fREF x 140 / 33 / 2 CTRLA = L, CTRLB = H, CTRLC = H f4 = fREF x 1 / 4 Measure at f2A, f2B, f2C (reference) Use with CTRLB at the low level f1B = fREF2 x 98 / 35 / 2 f2D = fREF2 x 98 / 35 / 3 CTRLA = H, CTRLB = L, CTRLC = H f2E = fREF2 x 80 / 20 / 2 CTRLA = L, CTRLB = L, CTRLC = H f4B = fREF2 x 1 / 4 Conditions -- -- -- -- 3 Multimedia ICs BU2173F *Measurement circuit R1 1 X1 R2 1M 2 3 4 C1 10pF C2 10pF 5 6 7 Control A Control C 8 9 VDD TSTO XTALI XTALO CTRLA CTRLB CTRLC TSTI VSS AVDD FOUT4 VDDIO FOUT1 TEST FOUT2 VSSIO FOUT3 AVSS 18 120 17 16 15 14 13 12 11 10 Clock output (2) Clock output (1) Clock output (4) fREF = 13.5MHz Note: Certain crystal resonators may require setting XTALI and XTALO to the optimum allowable values. *Application example fREF = 13.5MHz R1 1 X1 R2 1M 2 3 4 C1 10pF C2 10pF 5 6 7 Control A Control C 8 9 VDD TSTO XTALI XTALO CTRLA CTRLB CTRLC TSTI VSS AVDD FOUT4 VDDIO FOUT1 TEST FOUT2 VSSIO FOUT3 AVSS 18 120 17 16 15 14 13 12 11 10 Clock output (2) Clock output (1) Clock output (4) Note: Certain crystal resonators may require setting XTALI and XTALO to the optimum allowable values. This IC should be used mounted on a PC board. If mounted in a socket, characteristics of the IC may be adversely affected. 4 Multimedia ICs BU2173F *Attached componentsvoltage of AVDD effectively low, R1: To keep the and to enhance signal stability by separating AVDD and DVDD with an impedance. Be sure to attach. R2: Needed to provide a feedback resistance for the crystal resonator C1 / C2: When f0 must be adjusted according to the crystal resonator used, or when the crystal resonator results in unnecessary oscillation points, attach a PF and adjust according to the value for this capacitor. X1: Use a crystal resonator with an oscillation frequency of 13.5 MHz or 14.318 MHz. *External dimensions (Units: mm) 11.2 0.2 18 7.8 0.3 5.4 0.2 10 1 1.8 0.1 9 0.11 1.27 0.4 0.1 0.3Min. 0.15 SOP18 0.15 0.1 5 |
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